Use AtomicU64 instead of AtomicUsize in all 64-bit architectures' fal…

…lback

src/imp/fallback/imp.rs

@@ -6,14 +6,7 @@ use crate::utils::CachePadded;
 // Some 64-bit architectures have ABI with 32-bit pointer width (e.g., x86_64 X32 ABI,
 // aarch64 ILP32 ABI, mips64 N32 ABI). On those targets, AtomicU64 is fast,
 // so use it to reduce chunks of byte-wise atomic memcpy.
-#[cfg(any(target_arch = "aarch64", target_arch = "mips64", target_arch = "x86_64"))]
-use core::sync::atomic::AtomicU64 as AtomicChunk;
-#[cfg(not(any(target_arch = "aarch64", target_arch = "mips64", target_arch = "x86_64")))]
-use core::sync::atomic::AtomicUsize as AtomicChunk;
-#[cfg(any(target_arch = "aarch64", target_arch = "mips64", target_arch = "x86_64"))]
-type Chunk = u64;
-#[cfg(not(any(target_arch = "aarch64", target_arch = "mips64", target_arch = "x86_64")))]
-type Chunk = usize;
+use super::{AtomicChunk, Chunk};
 
 // Adapted from https://github.com/crossbeam-rs/crossbeam/blob/crossbeam-utils-0.8.7/crossbeam-utils/src/atomic/atomic_cell.rs#L969-L1016.
 #[inline]

src/imp/fallback/mod.rs

@@ -19,17 +19,34 @@
 // Some 64-bit architectures have ABI with 32-bit pointer width (e.g., x86_64 X32 ABI,
 // aarch64 ILP32 ABI, mips64 N32 ABI). On those targets, AtomicU64 is available and fast,
 // so use it to implement normal sequence lock.
+// Known architectures that have such ABI are x86_64, aarch64, and mips64. However,
+// we list all 64-bit architectures because similar ABIs may exist for other architectures.
+// (for target in $(rustc --print target-list); do target_spec=$(rustc --print target-spec-json -Z unstable-options --target "${target}"); [[ "$(jq <<<"${target_spec}" -r '."target-pointer-width"')" == "64" ]] && jq <<<"${target_spec}" -r '.arch'; done) | LC_ALL=C sort -u
 #[cfg(any(
     not(any(target_pointer_width = "16", target_pointer_width = "32")),
     target_arch = "aarch64",
+    target_arch = "bpf",
     target_arch = "mips64",
+    target_arch = "nvptx64",
+    target_arch = "powerpc64",
+    target_arch = "riscv64",
+    target_arch = "s390x",
+    target_arch = "sparc64",
+    target_arch = "wasm64",
     target_arch = "x86_64",
 ))]
 mod seq_lock;
 #[cfg(not(any(
     not(any(target_pointer_width = "16", target_pointer_width = "32")),
     target_arch = "aarch64",
+    target_arch = "bpf",
     target_arch = "mips64",
+    target_arch = "nvptx64",
+    target_arch = "powerpc64",
+    target_arch = "riscv64",
+    target_arch = "s390x",
+    target_arch = "sparc64",
+    target_arch = "wasm64",
     target_arch = "x86_64",
 )))]
 #[path = "seq_lock_wide.rs"]

src/imp/fallback/seq_lock.rs

@@ -20,6 +20,10 @@ pub(crate) type Stamp = usize;
 #[cfg(any(target_pointer_width = "16", target_pointer_width = "32"))]
 pub(crate) type Stamp = u64;
 
+// See imp.rs for details.
+type AtomicChunk = AtomicStamp;
+type Chunk = Stamp;
+
 /// A simple stamped lock.
 pub(crate) struct SeqLock {
     /// The current state of the lock.

src/imp/fallback/seq_lock_wide.rs

@@ -10,6 +10,10 @@ use core::{
 
 use crate::utils::Backoff;
 
+// See imp.rs for details.
+type AtomicChunk = AtomicUsize;
+type Chunk = usize;
+
 /// A simple stamped lock.
 ///
 /// The state is represented as two `AtomicUsize`: `state_hi` for high bits and `state_lo` for low

tools/no_atomic.sh

@@ -19,8 +19,7 @@ no_atomic_64=()
 no_atomic=()
 for target in $(rustc --print target-list); do
     target_spec=$(rustc --print target-spec-json -Z unstable-options --target "${target}")
-    res=$(jq <<<"${target_spec}" -r 'select(."atomic-cas" == false)')
-    [[ -z "${res}" ]] || no_atomic_cas+=("${target}")
+    [[ -z "$(jq <<<"${target_spec}" -r 'select(."atomic-cas" == false)')" ]] || no_atomic_cas+=("${target}")
     max_atomic_width=$(jq <<<"${target_spec}" -r '."max-atomic-width"')
     case "${max_atomic_width}" in
         # It is not clear exactly what `"max-atomic-width" == null` means, but they