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Uplifting 8051 architecture to new IL #2999

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merged 16 commits into from
Dec 14, 2022
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imbillow
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@imbillow imbillow commented Sep 2, 2022

SQUASH ME

Your checklist for this pull request

  • I've read the guidelines for contributing to this repository
  • I made sure to follow the project's coding style
  • I've documented or updated the documentation of every function and struct this PR changes. If not so I've explained why.
  • I've added tests that prove my fix is effective or that my feature works (if possible)
  • I've updated the rizin book with the relevant information (if needed)

Detailed description

continue #1609

Instrunction set: https://www.win.tue.nl/~aeb/comp/8051/set8051.html

/ 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
0x00 NOP AJMP LJMP RR INC INC INC INC INC INC INC INC INC INC INC INC
0x10 JBC ACALL LCALL RRC DEC DEC DEC DEC DEC DEC DEC DEC DEC DEC DEC DEC
0x20 JB AJMP RET RL ADD ADD ADD ADD ADD ADD ADD ADD ADD ADD ADD ADD
0x30 JNB ACALL RETI RLC ADDC ADDC ADDC ADDC ADDC ADDC ADDC ADDC ADDC ADDC ADDC ADDC
0x40 JC AJMP ORL ORL ORL ORL ORL ORL ORL ORL ORL ORL ORL ORL ORL ORL
0x50 JNC ACALL ANL ANL ANL ANL ANL ANL ANL ANL ANL ANL ANL ANL ANL ANL
0x60 JZ AJMP XRL XRL XRL XRL XRL XRL XRL XRL XRL XRL XRL XRL XRL XRL
0x70 JNZ ACALL ORL JMP MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV
0x80 SJMP AJMP ANL MOVC DIV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV
0x90 MOV ACALL MOV MOVC SUBB SUBB SUBB SUBB SUBB SUBB SUBB SUBB SUBB SUBB SUBB SUBB
0xA0 ORL AJMP MOV INC MUL ? MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV
0xB0 ANL ACALL CPL CPL CJNE CJNE CJNE CJNE CJNE CJNE CJNE CJNE CJNE CJNE CJNE CJNE
0xC0 PUSH AJMP CLR CLR SWAP XCH XCH XCH XCH XCH XCH XCH XCH XCH XCH XCH
0xD0 POP ACALL SETB SETB DA DJNZ XCHD XCHD DJNZ DJNZ DJNZ DJNZ DJNZ DJNZ DJNZ DJNZ
0xE0 MOVX AJMP MOVX MOVX CLR MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV
0xF0 MOVX ACALL MOVX MOVX CPL MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV MOV

...

Test plan

...

Closing issues

...

@XVilka
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XVilka commented Sep 4, 2022

Please add also yourself in SPDX copyright section of that file and @Basstorm as well.

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imbillow commented Nov 21, 2022

The format error seems to be because the clang-format version in my system is 15

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@thestr4ng3r thestr4ng3r left a comment

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Looks very nice already!

librz/analysis/arch/8051/8051_il.c Outdated Show resolved Hide resolved
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@imbillow imbillow force-pushed the asan-fuzz-uplifting-8051_ branch from a21efd6 to 52bf8d0 Compare November 27, 2022 12:42
@imbillow imbillow force-pushed the asan-fuzz-uplifting-8051_ branch from 52bf8d0 to ce35ba7 Compare November 27, 2022 12:45
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Great job!

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@XVilka XVilka left a comment

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Looks good, apart from a couple of comments. The remaining part would be the tracetest.

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@DMaroo DMaroo left a comment

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Looks pretty neat to me. Great work!

librz/analysis/arch/8051/8051_il.c Outdated Show resolved Hide resolved
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return STOREW(U16(a->d.addr), BOOL_TO_BV(v, 1));
}
case I8051_ADDRESSING_DIRECT:
return STORE(U16(a->d.addr), v);
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Instead of duplicating the address calculation logic, just use return STOREW(get_any(a), v).

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But it should not be equivalent

@DMaroo DMaroo added the RZIL label Nov 27, 2022
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@Rot127 Rot127 left a comment

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Could only skim over it briefly. But LGTM. Good job!

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* 0x05 iram addr
* 0x06-0x07 @(R0-R1)
* 0x08-0x0f, R0-R7
*/
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Is the meaning here common knowledge for people who know 8051? Otherwise I would suggest to add more context (this is the offset into the buffer?).

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Same for comments below.

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@github-actions github-actions bot removed the RZIL label Dec 11, 2022
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@imbillow many tests are broken on big endian platform:

[XX] db/asm/8051 <asm> djnz 0x40, 0x118b
-- <asm> djnz 0x40, 0x118b <--> d54088 ---> <IL>
-- assembly
-- IL
--- expected
+++ actual

@@ -1,1 +1,1 @@
-(seq (set res (- (load 0 (bv 16 0x40)) (bv 8 0x1))) (store 0 (bv 16 0x40) (var res)) (branch (! (is_zero (var res))) (jmp (bv 16 0x1288)) nop))
+(seq (set res (- (load 0 (bv 16 0x0)) (bv 8 0x1))) (store 0 (bv 16 0x0) (var res)) (branch (! (is_zero (var res))) (jmp (bv 16 0x1288)) nop))

[XX] db/asm/8051 <asm> dec 0x35
-- <asm> dec 0x35 <--> 1535 ---> <IL>
-- assembly
-- IL
--- expected
+++ actual
@@ -1,1 +1,1 @@
-(seq (set arg0 (load 0 (bv 16 0x35))) (store 0 (bv 16 0x35) (- (var arg0) (bv 8 0x1))))
+(seq (set arg0 (load 0 (bv 16 0x0))) (store 0 (bv 16 0x0) (- (var arg0) (bv 8 0x1))))

See all at https://app.travis-ci.com/github/rizinorg/rizin/jobs/590853977

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LGTM

@thestr4ng3r thestr4ng3r merged commit 291d2a6 into dev Dec 14, 2022
@thestr4ng3r thestr4ng3r deleted the asan-fuzz-uplifting-8051_ branch December 14, 2022 12:13
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7 participants