sw: Add LLC test and bump Cheshire with LLC fix

Bender.lock

@@ -46,7 +46,7 @@ packages:
     dependencies:
     - axi_slice
   axi_llc:
-    revision: 7d7fc1349d4915a657de535a491bc26fbf0d2cfa
+    revision: 7c681312ae1eb912052de98ddaf5d19e1c2b76ff
     version: null
     source:
       Git: https://github.com/pulp-platform/axi_llc
@@ -114,7 +114,7 @@ packages:
       Git: [email protected]:AlSaqr-platform/can_bus.git
     dependencies: []
   cheshire:
-    revision: 0c95210cf242c384fafe3019e84b8974c3ff1e92
+    revision: 04c05a80a778f49c02146a54c165d94c44b02c71
     version: null
     source:
       Git: https://github.com/pulp-platform/cheshire.git

Bender.yml

@@ -13,7 +13,7 @@ package:
 dependencies:
   register_interface: { git: https://github.com/pulp-platform/register_interface.git,   version: 0.4.2                                }
   axi:                { git: https://github.com/pulp-platform/axi.git,                  version: 0.39.1                               }
-  cheshire:           { git: https://github.com/pulp-platform/cheshire.git,             rev: 0c95210cf242c384fafe3019e84b8974c3ff1e92 } # branch: aottaviano/carfield
+  cheshire:           { git: https://github.com/pulp-platform/cheshire.git,             rev: 04c05a80a778f49c02146a54c165d94c44b02c71 } # branch: aottaviano/carfield
   hyperbus:           { git: https://github.com/pulp-platform/hyperbus.git,             rev: f039e601c8b6590181734e6d26ff8b77aa380412 } # branch: chi/add_fsm_with_Tcsh
   dyn_mem:            { git: https://github.com/pulp-platform/dyn_spm.git,              rev: 480590062742230dc9bd4050358a15b4747bdf34 } # branch: main
   safety_island:      { git: https://github.com/pulp-platform/safety_island.git,        rev: aaef55c798ab53560faaf451a86668fa1e6d0f3b } # branch: carfield

hw/carfield_pkg.sv

@@ -624,8 +624,8 @@ localparam cheshire_cfg_t CarfieldCfgDefault = '{
   LlcOutConnect     : 1,
   LlcOutRegionStart : 'h8000_0000,
   LlcOutRegionEnd   : 'h1_0000_0000,
-  LlcBypassRegionStart : 'h8_0000_0000,
-  LlcBypassRegionEnd   : 'h8_8000_0000,
+  LlcBypassRegionStart : 'h2_8000_0000,
+  LlcBypassRegionEnd   : 'h3_0000_0000,
   LlcUserMsb        : 9,
   LlcUserLsb        : 5,
   LlcCachePartition : 1,

sw/include/car_memory_map.h

@@ -76,6 +76,9 @@ extern void *__base_l2;
 #define CAR_HYPERRAM_BASE_ADDR 0x80400000
 #define CAR_HYPERRAM_END_ADDR  0x80800000
 
+// Bypass LLC
+#define CAR_LLC_BYPASS_OFFSET 0x200000000
+
 // Peripheral devices
 // from cheshire
 #define CAR_BOOTROM_BASE_ADDR        0x000002000000

sw/sw.mk

@@ -66,12 +66,16 @@ CAR_ELFLOAD_PULPD_INTF_PATH := $(basename $(CAR_ELFLOAD_PULPD_INTF_SRC_C))
 CAR_SW_TEST_SRCS_S	= $(wildcard $(CAR_SW_DIR)/tests/bare-metal/hostd/*.S)
 CAR_SW_TEST_SRCS_C	= $(filter-out $(CAR_ELFLOAD_BLOCKING_SAFED_SRC_C) $(CAR_ELFLOAD_BLOCKING_PULPD_SRC_C) $(CAR_ELFLOAD_PULPD_INTF_SRC_C), $(wildcard $(CAR_SW_DIR)/tests/bare-metal/hostd/*.c))
 
-CAR_SW_TEST_DRAM_DUMP	= $(CAR_SW_TEST_SRCS_S:.S=.car.dram.dump) $(CAR_SW_TEST_SRCS_C:.c=.car.dram.dump)
-CAR_SW_TEST_DRAM_SLM	= $(CAR_SW_TEST_SRCS_S:.S=.car.dram.slm)  $(CAR_SW_TEST_SRCS_C:.c=.car.dram.slm)
-CAR_SW_TEST_SPM_DUMP	= $(CAR_SW_TEST_SRCS_S:.S=.car.spm.dump)  $(CAR_SW_TEST_SRCS_C:.c=.car.spm.dump)
-CAR_SW_TEST_L2_DUMP	= $(CAR_SW_TEST_SRCS_S:.S=.car.l2.dump)   $(CAR_SW_TEST_SRCS_C:.c=.car.l2.dump)
-CAR_SW_TEST_SPM_ROMH	= $(CAR_SW_TEST_SRCS_S:.S=.car.rom.memh)  $(CAR_SW_TEST_SRCS_C:.c=.car.rom.memh)
-CAR_SW_TEST_SPM_GPTH	= $(CAR_SW_TEST_SRCS_S:.S=.car.gpt.memh)  $(CAR_SW_TEST_SRCS_C:.c=.car.gpt.memh)
+CAR_SW_TEST_SRC_EXCLUDE_DRAM =
+CAR_SW_TEST_SRC_EXCLUDE_SPM = llc_test.c
+CAR_SW_TEST_SRC_EXCLUDE_L2 = llc_test.c
+
+CAR_SW_TEST_DRAM_DUMP	= $(CAR_SW_TEST_SRCS_S:.S=.car.dram.dump) $(filter-out $(CAR_SW_TEST_SRC_EXCLUDE_DRAM),$(CAR_SW_TEST_SRCS_C:.c=.car.dram.dump))
+CAR_SW_TEST_DRAM_SLM	= $(CAR_SW_TEST_SRCS_S:.S=.car.dram.slm)  $(filter-out $(CAR_SW_TEST_SRC_EXCLUDE_DRAM),$(CAR_SW_TEST_SRCS_C:.c=.car.dram.slm))
+CAR_SW_TEST_SPM_DUMP	= $(CAR_SW_TEST_SRCS_S:.S=.car.spm.dump)  $(filter-out $(CAR_SW_TEST_SRC_EXCLUDE_SPM),$(CAR_SW_TEST_SRCS_C:.c=.car.spm.dump))
+CAR_SW_TEST_L2_DUMP	    = $(CAR_SW_TEST_SRCS_S:.S=.car.l2.dump)   $(filter-out $(CAR_SW_TEST_SRC_EXCLUDE_L2),$(CAR_SW_TEST_SRCS_C:.c=.car.l2.dump))
+CAR_SW_TEST_SPM_ROMH	= $(CAR_SW_TEST_SRCS_S:.S=.car.rom.memh)  $(filter-out $(CAR_SW_TEST_SRC_EXCLUDE_SPM),$(CAR_SW_TEST_SRCS_C:.c=.car.rom.memh))
+CAR_SW_TEST_SPM_GPTH	= $(CAR_SW_TEST_SRCS_S:.S=.car.gpt.memh)  $(filter-out $(CAR_SW_TEST_SRC_EXCLUDE_SPM),$(CAR_SW_TEST_SRCS_C:.c=.car.gpt.memh))
 
 car-sw-tests: $(CAR_SW_TEST_DRAM_DUMP) $(CAR_SW_TEST_SPM_DUMP) $(CAR_SW_TEST_L2_DUMP) $(CAR_SW_TEST_DRAM_SLM) $(CAR_SW_TEST_SPM_ROMH) $(CAR_SW_TEST_SPM_GPTH) car-pulpd-sw-offload-tests car-safed-sw-offload-tests mibench-automotive