Fix pull definitions #47
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module to match the verilog of the SRAM module itself. As far as I am aware, the VexRISC core does not need the same treatment because the VexRISC core does not define power supply pins at all. Note that this is a change to an automatically-generated file, and the change needs to be made elsewhere in the LiteX code to become permanent.
in defs.h, per the github issue #15 on caravel (where the error was previously; the error has since migrated to caravel_mgmt_soc_litex).
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@RTimothyEdwards Please resolve the conflicts to merge this PR. |
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@shalan : Done |
RTimothyEdwards
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This fixes the issue raised in the Caravel repository (issue #15) where the bit definitions for the pull-up and pull-down GPIO modes is incorrect in defs.h.