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common: fix UB in some bit shifts
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Fix a few instances of undefined behavior (that I'm not yet aware of any
concrete consequences of) in left shift expressions. Roughly, it's
undefined behavior to shift a `1` into the sign bit of a signed type.

Operands in bit shift expressions undergo integer promotions, but not
the usual arithmetic conversions. Notably, the second operand can't
promote the first operand to unsigned. Shifting `1` rather than `1U` can
lead to shifting a `1` into the sign bit, causing undefined behavior.

Relatedly, the integer promotions on a 32-bit platform will usually
promote `uint16_t` to a signed `int`, leading to undefined behavior in
left shift expressions.
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tlyu authored and dragonmux committed Jan 17, 2024
1 parent f93e4ab commit cea35a6
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Showing 2 changed files with 4 additions and 4 deletions.
4 changes: 2 additions & 2 deletions src/platforms/common/stm32/gpio.h
Original file line number Diff line number Diff line change
Expand Up @@ -46,10 +46,10 @@ static inline void bmp_gpio_clear(const uint32_t gpioport, const uint16_t gpios)
#else
#if defined(STM32F4) || defined(STM32F7)
/* NOLINTNEXTLINE(clang-diagnostic-int-to-pointer-cast) */
GPIO_BSRR(gpioport) = gpios << 16U;
GPIO_BSRR(gpioport) = (uint32_t)gpios << 16U;
#endif
/* NOLINTNEXTLINE(clang-diagnostic-int-to-pointer-cast) */
GPIO_BSRR(gpioport) = gpios << 16U;
GPIO_BSRR(gpioport) = (uint32_t)gpios << 16U;
#endif
}

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4 changes: 2 additions & 2 deletions src/platforms/common/swdptap.c
Original file line number Diff line number Diff line change
Expand Up @@ -151,7 +151,7 @@ static void swdptap_seq_out_clk_delay(const uint32_t tms_states, const size_t cl
{
for (size_t cycle = 0; cycle < clock_cycles; ++cycle) {
gpio_clear(SWCLK_PORT, SWCLK_PIN);
gpio_set_val(SWDIO_PORT, SWDIO_PIN, tms_states & (1 << cycle));
gpio_set_val(SWDIO_PORT, SWDIO_PIN, tms_states & (1U << cycle));
for (volatile uint32_t counter = target_clk_divider; counter > 0; --counter)
continue;
gpio_set(SWCLK_PORT, SWCLK_PIN);
Expand All @@ -167,7 +167,7 @@ static void swdptap_seq_out_no_delay(const uint32_t tms_states, const size_t clo
{
for (size_t cycle = 0; cycle < clock_cycles; ++cycle) {
gpio_clear(SWCLK_PORT, SWCLK_PIN);
gpio_set_val(SWDIO_PORT, SWDIO_PIN, tms_states & (1 << cycle));
gpio_set_val(SWDIO_PORT, SWDIO_PIN, tms_states & (1U << cycle));
gpio_set(SWCLK_PORT, SWCLK_PIN);
}
gpio_clear(SWCLK_PORT, SWCLK_PIN);
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