SPARC: Wrong disassembly of rdy instruction

[ceeac]

Using lastest v4 branch. (commit 2617b1c)

• Steps to reproduce:
  cstool -d sparc "\x83\x40\x00\x00"
• Expected output:
  rd %y, %g1
• Actual output:
  rd %y,
  Also, the number of operands is 0 and not 2 as expected.

[aquynh]

will fix in the next major update in v5: #1319

[rth7680]

Still present in v6-alpha.

[Rot127]

Just checked. This is an issues with flawed generated LLVM tables. This makes the bug not really quickly fixable. Because we would need to generate the decoder tables again.
This in turn is a full Auto-Sync update and more work.
So it will be part of the Beta when Sparc is updated.