From 4fced219f0fbb88d73a5ce05ea06f56289bfb906 Mon Sep 17 00:00:00 2001 From: Ng Zhi An Date: Thu, 24 Jun 2021 09:37:11 -0700 Subject: [PATCH] Add relaxed float to int conversions (#25) For #21. --- proposals/relaxed-simd/Overview.md | 36 ++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/proposals/relaxed-simd/Overview.md b/proposals/relaxed-simd/Overview.md index 3cebd0604b..2c01a0035c 100644 --- a/proposals/relaxed-simd/Overview.md +++ b/proposals/relaxed-simd/Overview.md @@ -127,6 +127,42 @@ def relaxed_i8x16_swizzle(a, s): return result ``` +### Float/Double to int conversions + +- `relaxed i32x4.trunc_f32x4_s` (relaxed version of `i32x4.trunc_sat_f32x4_s`) +- `relaxed i32x4.trunc_f32x4_u` (relaxed version of `i32x4.trunc_sat_f32x4_u`) +- `relaxed i32x4.trunc_f64x2_s_zero` (relaxed version of `i32x4.trunc_sat_f64x2_s_zero`) +- `relaxed i32x4.trunc_f64x2_u_zero` (relaxed version of `i32x4.trunc_sat_f64x2_u_zero`) + +These instructions have the same behavior as the non-relaxed instructions for +lanes that are in the range of an `i32` (signed or unsigned depending on the +instruction). For lanes that contain values which are out of bounds or NaN, the +result is implementation-defined. + +```python +def relaxed_i32x4_trunc_f32x4(a : f32x4, signed : bool) -> i32x4: + result = [] + min = signed ? INT32_MIN : UINT32_MIN + max = signed ? INT32_MAX : UINT32_MAX + for i in range(4): + r = truncate(a[i]) + if min <= r <= max: + result[i] = r + else: + result[i] = UNDEFINED + +def relaxed_i32x4_trunc_f64x2_zero(a : f64x2, signed : bool) -> i32x4: + result = [0, 0, 0, 0] + min = signed ? INT32_MIN : UINT32_MIN + max = signed ? INT32_MAX : UINT32_MAX + for i in range(2): + r = truncate(a[i]) + if min <= r <= max: + result[i] = r + else: + result[i] = UNDEFINED +``` + ## Binary format > This is a placeholder for binary format of instructions and new constructs.